GPU-accelerated syndrome decoding for quantum LDPC codes below the 63 µs latency threshold
| dc.contributor.author | Ferraz, O. | |
| dc.contributor.author | Coutinho, B. C. | |
| dc.contributor.author | Falcão, G. | |
| dc.contributor.author | Gomes, M. | |
| dc.contributor.author | Monteiro, F. A. | |
| dc.contributor.author | Silva, V. | |
| dc.contributor.editor | Matthews, Michael B. | |
| dc.date.accessioned | 2026-10-12T08:59:20Z | |
| dc.date.issued | 2025 | |
| dc.date.updated | 2026-10-12T09:55:06Z | |
| dc.description.abstract | This paper presents a GPU-accelerated decoder for quantum low-density parity-check (QLDPC) codes that achieves sub-63 µs latency, below the surface code decoder’s real-time threshold demonstrated on Google’s Willow quantum processor. While surface codes have demonstrated below-threshold performance, the encoding rates approach zero as code distances increase, posing challenges for scalability. Recently proposed QLDPC codes, such as those by Panteleev and Kalachev, offer constant-rate encoding and asymptotic goodness but introduce higher decoding complexity. To address such limitation, this work presents a parallelized belief propagation decoder leveraging syndrome information on commodity GPU hardware. Parallelism was exploited to maximize performance within the limits of target latency, allowing decoding latencies under 26 µs for [[784, 24, 24]] codes and as low as 16.9 µs for smaller codes, meeting the tight timing constraints of superconducting qubit cycles. These results show that real-time, scalable decoding of asymptotically good quantum codes is achievable using widely available commodity hardware, advancing the feasibility of fault-tolerant quantum computation beyond surface codes. | eng |
| dc.event.date | 2025 | |
| dc.event.location | Pacific Grove, CA, USA | eng |
| dc.event.title | Asilomar Conference on Signals, Systems, and Computers | |
| dc.event.type | Conferência | pt |
| dc.identifier.citation | Ferraz, O., Coutinho, B. C., Falcão, G., Gomes, M., Monteiro, F. A.,& Silva, V. (2025). GPU-accelerated syndrome decoding for quantum LDPC codes below the 63 µs latency threshold. In M. B. Matthews (Ed.), 2025 59th Asilomar Conference on Signals, Systems, and Computers (pp. 1878-1882). IEEE. https://doi.org/10.1109/IEEECONF67917.2025.11443687 | |
| dc.identifier.doi | 10.1109/IEEECONF67917.2025.11443687 | |
| dc.identifier.isbn | 979-8-3315-8745-1 | |
| dc.identifier.issn | 1058-6393 | |
| dc.identifier.uri | https://hdl.handle.net/10071/38710 | |
| dc.language.iso | eng | |
| dc.pagination | 1878 - 1882 | |
| dc.peerreviewed | yes | |
| dc.publisher | IEEE | |
| dc.relation | UID/50008/2025. | |
| dc.relation.ispartof | 2025 59th Asilomar Conference on Signals, Systems, and Computers | |
| dc.rights | openAccess | |
| dc.subject | Fault tolerance | eng |
| dc.subject | Codes | eng |
| dc.subject | Fault tolerant systems | eng |
| dc.subject | Graphics processing units | eng |
| dc.subject | Real-time systems | eng |
| dc.subject | Hardware | eng |
| dc.subject | Parity check codes | eng |
| dc.subject | Encoding | eng |
| dc.subject | Decoding | eng |
| dc.subject | Surface treatment | eng |
| dc.subject.fos | Domínio/Área Científica::Ciências Naturais::Ciências da Computação e da Informação | por |
| dc.subject.fos | Domínio/Área Científica::Engenharia e Tecnologia::Engenharia Eletrotécnica, Eletrónica e Informática | por |
| dc.title | GPU-accelerated syndrome decoding for quantum LDPC codes below the 63 µs latency threshold | eng |
| dc.type | conferenceObject | |
| iscte.identifier.ciencia | https://ciencia.iscte-iul.pt/id/ci-pub-112750 | |
| iscte.subject.ods | Indústria, inovação e infraestruturas | por |
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