GPU-accelerated syndrome decoding for quantum LDPC codes below the 63 µs latency threshold

dc.contributor.authorFerraz, O.
dc.contributor.authorCoutinho, B. C.
dc.contributor.authorFalcão, G.
dc.contributor.authorGomes, M.
dc.contributor.authorMonteiro, F. A.
dc.contributor.authorSilva, V.
dc.contributor.editorMatthews, Michael B.
dc.date.accessioned2026-10-12T08:59:20Z
dc.date.issued2025
dc.date.updated2026-10-12T09:55:06Z
dc.description.abstractThis paper presents a GPU-accelerated decoder for quantum low-density parity-check (QLDPC) codes that achieves sub-63 µs latency, below the surface code decoder’s real-time threshold demonstrated on Google’s Willow quantum processor. While surface codes have demonstrated below-threshold performance, the encoding rates approach zero as code distances increase, posing challenges for scalability. Recently proposed QLDPC codes, such as those by Panteleev and Kalachev, offer constant-rate encoding and asymptotic goodness but introduce higher decoding complexity. To address such limitation, this work presents a parallelized belief propagation decoder leveraging syndrome information on commodity GPU hardware. Parallelism was exploited to maximize performance within the limits of target latency, allowing decoding latencies under 26 µs for [[784, 24, 24]] codes and as low as 16.9 µs for smaller codes, meeting the tight timing constraints of superconducting qubit cycles. These results show that real-time, scalable decoding of asymptotically good quantum codes is achievable using widely available commodity hardware, advancing the feasibility of fault-tolerant quantum computation beyond surface codes.eng
dc.event.date2025
dc.event.locationPacific Grove, CA, USAeng
dc.event.titleAsilomar Conference on Signals, Systems, and Computers
dc.event.typeConferênciapt
dc.identifier.citationFerraz, O., Coutinho, B. C., Falcão, G., Gomes, M., Monteiro, F. A.,& Silva, V. (2025). GPU-accelerated syndrome decoding for quantum LDPC codes below the 63 µs latency threshold. In M. B. Matthews (Ed.), 2025 59th Asilomar Conference on Signals, Systems, and Computers (pp. 1878-1882). IEEE. https://doi.org/10.1109/IEEECONF67917.2025.11443687
dc.identifier.doi10.1109/IEEECONF67917.2025.11443687
dc.identifier.isbn979-8-3315-8745-1
dc.identifier.issn1058-6393
dc.identifier.urihttps://hdl.handle.net/10071/38710
dc.language.isoeng
dc.pagination1878 - 1882
dc.peerreviewedyes
dc.publisherIEEE
dc.relationUID/50008/2025.
dc.relation.ispartof2025 59th Asilomar Conference on Signals, Systems, and Computers
dc.rightsopenAccess
dc.subjectFault toleranceeng
dc.subjectCodeseng
dc.subjectFault tolerant systemseng
dc.subjectGraphics processing unitseng
dc.subjectReal-time systemseng
dc.subjectHardwareeng
dc.subjectParity check codeseng
dc.subjectEncodingeng
dc.subjectDecodingeng
dc.subjectSurface treatmenteng
dc.subject.fosDomínio/Área Científica::Ciências Naturais::Ciências da Computação e da Informaçãopor
dc.subject.fosDomínio/Área Científica::Engenharia e Tecnologia::Engenharia Eletrotécnica, Eletrónica e Informáticapor
dc.titleGPU-accelerated syndrome decoding for quantum LDPC codes below the 63 µs latency thresholdeng
dc.typeconferenceObject
iscte.identifier.cienciahttps://ciencia.iscte-iul.pt/id/ci-pub-112750
iscte.subject.odsIndústria, inovação e infraestruturaspor

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