Graph-based contrastive learning for self-supervised semiconductor wafer defect detection

dc.contributor.authorAwais, M.
dc.contributor.authorPostolache, O. A.
dc.contributor.authorOliveira, S. M.
dc.date.accessioned2026-07-07T15:52:35Z
dc.date.issued2026
dc.date.updated2026-07-07T16:52:13Z
dc.description.abstractSemiconductor wafer defect detection faces a critical challenge: traditional supervised methods require extensive labeled datasets that are costly to obtain. This paper presents a novel self-supervised approach combining Graph Neural Networks (GNNs) with contrastive learning for defect detection that minimizes reliance on labeled training data. Our method introduces a theoretically-grounded graph construction using 8-connectivity patterns that preserves spatial locality, with edge weights capturing geometric and semantic relationships. The core innovation is a multi-criteria contrastive learning framework incorporating spatial pattern similarity, defect density proximity, and production lot relationships to define positive-negative pairs using domain-driven heuristics rather than manual annotations. We implement this using a Graph Isomorphism Network (GIN) with jumping knowledge connections for multi-scale defect patterns. Evaluation on the WM-811K dataset (811,457 wafer maps from 46,293 lots) demonstrates that unsupervised clustering on learned embeddings achieves ARI of 0.89 and NMI of 0.87, while supervised fine-tuning on these embeddings yields 98.6% classification accuracy (ARI 0.98, NMI 0.96), maintaining 95.7% accuracy with only 25% labeled data. Our approach handles class imbalance (91.5% normal vs. 8.5% defective) across 9 defect patterns. Deployment analysis shows 8.3ms inference time, 387MB memory footprint, and 78% cost reduction versus manual inspection, with robustness to sensor noise and an 89.3% out-of-distribution detection rate. This provides the first contrastive learning-GNN application for wafer defect detection, offering scalable industrial quality control where labeled data is scarce.eng
dc.identifier.citationAwais, M., Postolache, O. A., & Oliveira, S. M. (2026). Graph-based contrastive learning for self-supervised semiconductor wafer defect detection. Journal of Intelligent Manufacturing. https://doi.org/10.1007/s10845-026-02906-3
dc.identifier.doi10.1007/s10845-026-02906-3
dc.identifier.issn0956-5515
dc.identifier.urihttps://hdl.handle.net/10071/37789
dc.language.isoeng
dc.peerreviewedyes
dc.publisherSpringer
dc.relationUID/50008: Instituto de Telecomunicações
dc.rightsopenAccess
dc.subjectSelf-supervised learningeng
dc.subjectWafer defect detectioneng
dc.subjectContrastive learningeng
dc.subjectGraph neural networkseng
dc.subjectClusteringeng
dc.subjectSemiconductor manufacturingeng
dc.subject.fosDomínio/Área Científica::Engenharia e Tecnologia::Engenharia Eletrotécnica, Eletrónica e Informáticapor
dc.titleGraph-based contrastive learning for self-supervised semiconductor wafer defect detectioneng
dc.typearticle
dc.volumeN/A
iscte.identifier.cienciahttps://ciencia.iscte-iul.pt/id/ci-pub-119026
iscte.journalJournal of Intelligent Manufacturing

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