LogicWiSARD: Memoryless synthesis of weightless neural networks

dc.contributor.authorMiranda, I. D. S.
dc.contributor.authorArora, A.
dc.contributor.authorSusskind, Z.
dc.contributor.authorVillon, L. A. Q.
dc.contributor.authorKatopodis, R. F.
dc.contributor.authorDutra, D. L. C.
dc.contributor.authorAraújo, L. S. de.
dc.contributor.authorLima, P. M. V.
dc.contributor.authorFrança, F. M. G.
dc.contributor.authorJohn, L. K.
dc.contributor.authorBreternitz Jr., M.
dc.date.accessioned2022-11-09T16:01:50Z
dc.date.available2022-11-09T16:01:50Z
dc.date.issued2022
dc.date.updated2022-11-09T16:00:13Z
dc.description.abstractWeightless neural networks (WNNs) are an alternative pattern recognition technique where RAM nodes function as neurons. As both training and inference require mostly table lookups, few additions, and no multiplications, WNNs are suitable for high-performance and low-power embedded applications. This work introduces a novel approach to implement WiSARD, the leading WNN state-of-the-art architecture, completely eliminating memories and arithmetic circuits and utilizing only logic functions. The approach creates compressed minimized implementations by converting trained WNN nodes from lookup tables to logic functions. The proposed LogicWiSARD is implemented in FPGA and ASIC technologies to illustrate its suitability for edge inference. Experimental results show more than 80% reduction in energy consumption when the proposed LogicWiSARD model is compared with a multilayer perceptron network (MLP) of equivalent accuracy. Compared to previous work on FPGA implementations for WNNs, convolutional neural networks, and binary neural networks, the energy savings of LogicWiSARD range between 32.2% and 99.6%.eng
dc.description.versioninfo:eu-repo/semantics/acceptedVersion
dc.event.date2022
dc.event.locationGothenburg, Swedeneng
dc.event.title33rd International Conference on Application-specific Systems, Architectures and Processors (ASAP)
dc.event.typeConferênciapt
dc.identifier.citationMiranda, I. D. S., Arora, A., Susskind, Z., Villon, L. A. Q., Katopodis, R. F., Dutra, D. L. C., Araújo, L. S. de., Lima, P. M. V., França, F. M. G., John, L. K., & Breternitz Jr., M. (2022). LogicWiSARD: Memoryless synthesis of weightless neural networks. In 33rd International Conference on Application-specific Systems, Architectures and Processors (pp. 19-26). IEEE. https://doi.org/10.1109/ASAP54787.2022.00014
dc.identifier.doi10.1109/ASAP54787.2022.00014
dc.identifier.isbn978-1-6654-8308-7
dc.identifier.issn2160-0511
dc.identifier.urihttp://hdl.handle.net/10071/26404
dc.language.isoeng
dc.pagination19 - 26
dc.peerreviewedyes
dc.publisherIEEE
dc.relation1912-32159
dc.relation001
dc.relation.ispartof2022 IEEE 33rd International Conference on Application-specific Systems, Architectures and Processors (ASAP)
dc.rightsopen access
dc.subjectWeightless neural networkseng
dc.subjectWiSARDeng
dc.subjectFPGAeng
dc.subjectVLSIeng
dc.subject.fosDomínio/Área Científica::Ciências Naturais::Ciências da Computação e da Informaçãopor
dc.titleLogicWiSARD: Memoryless synthesis of weightless neural networkseng
dc.typeconferenceObject
dspace.entity.typePublicationen
iscte.identifier.cienciahttps://ciencia.iscte-iul.pt/id/ci-pub-91333

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